Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/Silicon Labs/Series0/EZR32HG/EZR32HG320F64R63/RTC/CTRL#0x0
Control Register
RTC Enable
Debug Mode Run Enable
Compare Channel 0 is Top Value
https://github.com/cmsis-svd/cmsis-svd-data